While Intel XPUs Are Delayed, Here's Some More FPGAs To Tide You Over

You might not be able to get your hands on a Falcon Shores XPU for another two years, but Intel has some shiny new 400Gbps FPGAs for you to play with while you wait.

Less than a week after canning its Rialto Bridge GPUs and delaying its Falcon Shores XPU – basically ensuring that AMD will beat them to market with a converged CPU-GPU for the datacenter – Intel popped into chat to remind everyone that its Agilex team is still making FPGAs.

The chipmaker's latest addition to its FPGA line-up is the Agilex 7 with F-Tile, which the company boasts has the fastest FPGA transceivers on the market.

FPGAs are employed in a variety of workloads – often where ASICs may not offer enough flexibility and general-purpose compute can't achieve desired performance latency – including telecommunications, datacenter, networking, and even crypto mining and high-frequency trading. In the case of Intel's newest Agilex chips, the card aims to address data and bandwidth-intensive workloads common in datacenters and high-speed networks.

The F-Tile part of the name comes from the use of Intel's heterogenous chiplet architecture and multi-die interconnect bridge (EMIB) packaging tech, which allows the company to append additional functionality tuned to specific markets or applications to a common FPGA block.

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Specifically, the F-Tile is a bank of high-speed transceivers attached to the main FPGA die. According to Intel's docs, the F-Tile sports 20 PAM4 transceivers in total, including four "high-speed" channels operating at 116Gbps and 16 general-purpose channels running at 58Gbps. Compared to previous FPGAs, Intel says the new chip offers about twice the bandwidth per channel, while consuming less power.

The FPGA also features a dedicated Ethernet chiplet good for 400Gbps. Connectivity to the host is achieved using either PCIe 5.0 or CXL 1.1, both of which are capable of around 64GBps of bandwidth. However, that does mean for optimal performance you'll need to pair these with either Intel's long-delayed Sapphire Rapids CPUs or AMD's new Epyc 4 chips. Pop this thing in an older Ice Lake or AMD Milan system and you're going to max out at around 256Gbps and likely much less than that.

The chip itself is based on Intel's aging 10nm manufacturing process, which first started showing up in Cannon Lake chips five years ago. However, that may not be the case for much longer. Earlier this week, Taiwanese newspaper UDN reported Intel China executive Wang Rui saying that the company had finalized the design and had taped out its 18A and 20A – equivalent to 1.8nm and 2nm – process nodes.

Intel maintains that the process nodes will be manufacture ready by 2024, arriving in its Apollo Lake CPUs the same year. Well, if they aren't delayed or canceled first. ®