AMD's Latest Epyc Is Slimmer, Cooler, And Ready To Party At The Edge

AMD's latest CPU is a shrunken Epyc optimized for power-limited and thermally challenging telco and cloud edge deployments.

Code named "Siena" the House of Zen's 8004-series processors are the final entry in the chipmaker's Epyc 4 roadmap, which already includes general-purpose, high-performance compute, and cloud-optimized CPUs.

AMD envisions Siena being deployed in a variety of environments ranging from factory floors and remote offices to telecom base stations and remote datacenters. These environments can be quite challenging compared to the typical climate-controlled datacenter where noise or power consumption aren't as big a concern, Lynn Comp, VP of server product and technology marketing at AMD, explained in a briefing ahead of the launch.

Because of this, nearly every facet of the chip – including core count, IO, memory, and even its socket – has been cut down to maximize power efficiency, thermals, and minimize its footprint.

Under the hood, we see a familiar arrangement of compute chiplets surrounding a central IO die. In fact, Siena uses the same chiplets as we saw in AMD's cloud-native Bergamo Epycs in June. The difference is where that chip supported up to eight compute dies, Siena's smaller SP6 socket can only accommodate four.

Like Bergamo, each of these core complex dies (CCDs) have up to 16 of AMD's miniaturized Zen 4c cores. These cores trade top-end performance for a 35 percent smaller area and improved efficiency compared to the cores found in AMD's general-purpose Genoa Epycs introduced last fall.

These cores, while smaller, are still based on the same instruction set architecture and offer all of the same features as AMD's full-fat Zen 4 cores.

When all four CCDs on the package are populated, the chip can be configured with up to 64 cores and 128 threads. However, for less compute-intensive workloads, the chip can be configured with as few as eight cores. We're told this is achieved using a single compute die with half of the cores disabled. This may seem like an odd choice considering AMD already has higher performance eight-core CCDs ready to go, but Mark Bode, senior director of server product management at AMD, told us us the decision to stick with Zen 4c cores was made to prioritize power efficiency.

AMD's edge-optimized Epycs can be had with between eight and 64 Zen 4c cores

AMD's edge-optimized Epycs can be had with between eight and 64 Zen 4c cores

Despite the configuration, clock speeds are actually quite consistent across the entire product stack, with base clocks of 2-2.65GHz and boost clocks of 3-3.1GHz.

The same can't be said of power consumption, which scales proportionately with core count from a minimum configurable thermal design power (TDP) of 70 watts on AMD's eight-core variant to up to 225 watts on the top-specced SKU. That's quite the power savings compared to AMD's Genoa and Bergamo Epycs, which can easily top 400 watts under full load.

In addition to their comparatively low TDP, AMD also offers network equipment building system (NEBS) compliant versions of each chip, which are designed to operate in more extreme temperature conditions ranging from a frigid -5°C to a sweltering 85°C.

The fat-trimming is most apparent in the memory and IO departments. The chip is limited to six DDR5 channels and 96 PCIe 5.0 lanes compared to 12 channels and 128 lanes on the rest of the Epyc 4 lineup. What's more, the chip only supports single-socket configurations.

This means Siena is limited to 1.152TB of memory capacity. However, if that's too confining, the chip does have 48 CXL 1.1 lanes, which support memory expansion modules, like we've seen from Samsung, Micron, or Astera Labs. These modules allow you to extend the memory footprint of a system beyond the CPU's maximum capacity at the expense of slightly higher access latencies, usually around one NUMA hop.

Despite a heavy emphasis on lower power consumption, AMD insists its 8004-series chips are still more than capable of going toe-to-toe with Intel's Sapphire Rapids Xeon Scalable Processors.

AMD also claims its chips are up to twice as efficient in the SPECpower performance per watt benchmark and up to 16 percent faster in video-encoding workloads. However, grab a grain of salt while we wait for independent benchmarks.

At launch, AMD highlighted three OEM systems it argues illustrate Siena's flexibility: a Dell PowerEdge box designed for scale-out container workloads, a Lenovo ThinkEdge system optimized for edge AI and data analytics, and a Supermicro chassis tuned for edge and telco-datacenter deployments.

The chips have also caught the attention of Microsoft, which in a statement highlighted the potential for customers in retail or manufacturing to run Azure services at the edge.

AMD's Siena processors are available now with 1,000-unit pricing ranging from $490 to $5,450 a piece depending on the SKU. ®

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